Regviz

NXP Semiconductors /LPC5410x /CT32B2 /TCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC5410x/CT32B2/TCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CEN 0 (DISABLED)CRST 0RESERVED

CRST=DISABLED, CEN=DISABLED

Description

Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR.

Fields

CEN

Counter enable.

0 (DISABLED): Disabled.The counters are disabled.

1 (ENABLED): Enabled. The Timer Counter and Prescale Counter are enabled.
CRST

Counter reset.

0 (DISABLED): Disabled. Do nothing.

1 (ENABLED): Enabled. The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data